Blog
CVA6’s Instruction and WriteBack Data cache
Our work on Culsans (see previous blog entry) forced us to become very familiar with the architecture of the caches in CVA6. We did an in-depth...
A RISC-V MCU to for ROS2
roscore-v - this is the name of the latest project we've started together with Acceleration Robotics, a Spanish robotics semiconductor startup that...
3…2…1 Let’s start with Culsans!
Culsans - the Etruscan version of Janus, the two-faced and also four-faced god, god of the first and last of the year, of the beginning and the end,...
Adding IRQ support to CVA6 in LiteX
In the previous blog post we left the CVA6 porting in LiteX basically without interrupt support. Since this is an unacceptable solution, I've...
Porting OpenHW’s CVA6 to Litex
I've just seen the LiteX's console appearing on my terminal after booting my Digilent Nexys A7 board with a LiteX bitfile containinig OpenHW's CVA6...