Recent Posts
- Enabling UVM Support in Verilator Series — Constrained Randomization Support for Structs
- Enabling UVM Support in Verilator Series — Constrained Randomization Support for All Types of Arrays
- SoC Integration using Amaranth HDL
- Delving into ITP and HOL4 for digital design and verification
- Enabling UVM Support in Verilator Series — Basic Randomization Support for Aggregate data types